The input offset voltage of an operational amplifier is the differential dc input voltage required to provide a zero output voltage when there is no signal input. Input offset voltage is an inherent source of errors in operational amplifiers which is caused by a number of factors, including lack of symmetry in the differential input stage and lack of precise bias. The severity of the error produced and, therefore, the need for offset compensation circuitry is dependent on the particular operational amplifier application.
A comparator is one application of operational amplifiers. In A/D converters, such as the charge redistribution coder disclosed in U.S. Pat. No. 4,129,863 to Gray et al, issued Dec. 12, 1978, input offset voltage compensation of the comparator is required to minimize idle channel noise and crosstalk enhancement. This enhancement is most acute when the comparator is biased, by accumulated dc offset, at or near a code step boundary. Under this condition, small signal perturbations, such as idle channel noise and crosstalk, are coded as different digital words thereby amplifying the original signal perturbation on decoding. This results in errors in data transmission systems and produces an undesirable audible noise in voice transmission systems. To reduce these errors, the comparator is typically biased or zero set to less than one quarter of an LSB (least significant bit) or ground.
A prior art technique of zero setting a comparator within an A/D converter is through the use of polarity bit feedback. Pursuant to this technique, the sign bit of the encoded signal is used to offset the sampled analog signal to compensate for the average value of input offset voltage. While the use of polarity bit feedback provides satisfactory compensation in many applications, the feedback response is too slow for high speed A/D converters.
In a pending U.S. Pat. application of the present inventors, Ser. No. 111,997, filed Jan. 14, 1980, assigned to the present assignee, and incorporated herein by reference, input offset voltage of an operational amplifier is compensated by using electronic switches and capacitors. An input capacitor is disposed in series with the input signal terminal of the amplifier. A feedback capacitor is located in a loop between the feedback input terminal and the amplifier output terminal. Periodically, the amplifier signal input terminal is grounded by an input reset switch. The output voltage, approximately equal to the offset voltage, is then stored on the feedback capacitor by operation of a feedback shunt switch and a feedback reset switch. These switches shunt or disconnect one side of the feedback capacitor from the feedback loop and connect the second side of the feedback capacitor to ground.
Inherent in the operation of this circuitry are compensation errors caused by the gain of the operational amplifier and by unequal electronic charges injected on the amplifier input terminals by switch operations. While judicious circuit design and manufacture can reduce errors attributable to switch operation, a residual input offset voltage of 2-3 millivolts remains. This residual offset is significant in some operational amplifier applications. In a comparator, such as in the above-cited charge redistribution coder, the maximum signal level can be 3 volts and the least significant bit 600.mu.volts. Consequently, the comparator must be zero set to less than 150.mu.volts.